Non-volatile semiconductor memory device and writing method...

Static information storage and retrieval – Addressing – Plural blocks or banks

Reexamination Certificate

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C365S185220, C365S210130

Reexamination Certificate

active

11085575

ABSTRACT:
To provide a non-volatile semiconductor memory device which can increase the speed of a writing operation of a physical checker pattern, a logical checker pattern, etc. carried out in an inspection process.First group writing circuits30a, 30cconnected to even-numbered bit lines BL0, BL2and second group writing circuits30b, 30dconnected to odd-numbered bit lines BL1, BL3are controlled to an active state and a non-active state respectively on the basis of control signals TSE, TSO. The writing operation of the physical checker pattern is carried out by a program operation for a first page which is carried out while a first word and the first group writing circuits are set to the active state, a program operation for a second page which is carried out while a second word line and the second group writing circuits are set to the active state, and a simultaneous verify operation of the first and second pages which is carried out while the first and second word lines and all the writing circuits are set to the active state.

REFERENCES:
patent: 5293350 (1994-03-01), Kim et al.
patent: 6009027 (1999-12-01), Kobatake
patent: 6414874 (2002-07-01), Akaogi
patent: 6480419 (2002-11-01), Lee
patent: 11-121721 (1999-04-01), None
patent: 11-203879 (1999-07-01), None
patent: 11-328981 (1999-11-01), None
patent: 2001-229684 (2001-08-01), None
patent: 2002-203393 (2002-07-01), None

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