Insulated gate field effect transistor and its manufacturing met

Details Insulated gate field effect transistor and its manufacturing met Insulated gate field effect transistor and its manufacturing met

1991-05-24

1992-08-25

Wojciechowicz, Edward J.

357 2, 357 4, 357 59, 357 60, 357 91, 357 234, H01L 2701

Patent

active

051423448

ABSTRACT:
An insulated gate field effect transistor comprises a non-single-crystalline semiconductor layer formed on a substrate, a gate electrode is formed on a portion of the surface of said semiconductor layer, and a gate insulated film is disposed between said gate electrode and said semiconductor layer. A non-single-crystalline channel region is defined within said semiconductor layer just below said gate electrode. A source region and a drain region are transformed from and defined within said semiconductor layer immediately adjacent to said channel region in an opposed relation, said source and drain regions being crystallized to a higher degree than that of said channel region by selectively irradiating portions of said semiconductor layer using said gate electrode as a mask.

REFERENCES:
patent: 4459739 (1984-07-01), Shepherd et al.
patent: 4727044 (1988-02-01), Yamazaki
patent: 4959700 (1990-09-01), Yamazaki
G. Yaron & L. D. Hess, "Application of laser annealing techniques to increase channel mobility in silicon on sapphire transistors" Appl. Phys. Letts. 36(3), 1 Feb. 1980 pp. 220-222.

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