Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-12-18

2007-12-18

Pham, Ly Duy (Department: 2827)

Static information storage and retrieval

Interconnection arrangements

C365S069000, C365S072000, C365S136000, C365S149000

Reexamination Certificate

active

11134476

ABSTRACT:
A semiconductor memory device that can achieve high-speed operation or that is highly integrated and simultaneously can achieve high-speed operation is provided. Transistors are disposed on both sides of diffusion layer regions to which capacitor for storing information is connected and other diffusion layer region of each transistor is connected to the same bit line. When access to a memory cell is made, two transistors are activated and the information is read. When writing operation to the memory cell is carried out, two transistors are used and electric charges are written to the capacitor.

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John-Wan Jung et al., “A Fully working 0.14 μm DRAM Technology with Polymetal (W/WNx/Poly-Si) Gate”, 2000 IEEE, 4 pages.

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