Delay circuit for synchronizing arrival of a clock signal at...

Details Delay circuit for synchronizing arrival of a clock signal at... Delay circuit for synchronizing arrival of a clock signal at...

2007-12-04

2007-12-04

Le, Dinh T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Having specific delay in producing output waveform

C327S276000, C327S264000

Reexamination Certificate

active

11044336

ABSTRACT:
A clock signal generation system and method to distribute at least one clock signal to a plurality of points on a circuit board using a plurality of digitally programmable delay circuits each of which delays the clock signal by a desired amount so as to synchronize arrival of the clock signal when distributed to each of the plurality of points on the circuit. Each digitally programmable delay circuit comprises a plurality of circuit stages connected in series with each other. Each circuit stage comprises a plurality of transistors of a first type (e.g., P-type) connected in parallel with each other, and a plurality of transistors of a second type (e.g., N-type) connected in parallel with each other. In each circuit stage, one or more of the plurality of transistors of the first type are selected to delay a rising edge, and one or more of the plurality of transistors of a second type are selected to delay a falling edge.

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International Search Report dated Sep. 25, 2006 in connection with PCT Application No. PCT/US06/01728.

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