Procedural graphics architectures and techniques

Computer graphics processing and selective visual display system – Computer graphics processing – Three-dimension

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C345S586000

Reexamination Certificate

active

11171672

ABSTRACT:
Techniques and tools for rendering procedural graphics are described. For example, an architecture is provided which allows evaluation of geometric, transform, texture, and shading procedures locally for a given set of procedure parameter values. This evaluation is performed in parallel for different parameter values on a single-instruction, multiple-data array to allow parallel processing of a procedure set. In another example, a sampling controller is described which selects sets of parameter points for evaluation based on information in tag maps, rate maps, and parameter maps.

REFERENCES:
patent: 5903458 (1999-05-01), Stewart et al.
patent: 5977977 (1999-11-01), Kajiya et al.
patent: 6046744 (2000-04-01), Hoppe
patent: 6292192 (2001-09-01), Moreton
patent: 6606092 (2003-08-01), Driemeyer et al.
patent: 7050955 (2006-05-01), Carmel et al.
patent: 2002/0003541 (2002-01-01), Boyd et al.
patent: 2003/0164823 (2003-09-01), Baldwin et al.
patent: 2003/0194057 (2003-10-01), Dewaele
Amburn et al., “Managing Geometric Complexity with Enhanced Procedural Models”, 1986, ACM, pp. 186-195.
Elliot, “Programming Graphics Processors Functionally”, 2004, ACM, pp. 45-56.
Buck et al., “Brook for GPUs: Stream Computing on Graphics Hardware,” InACM Transactions on Graphics, 23(3):777-786, Aug. 2004.
Buck et al., “Data Parallel Computation on Graphics Hardware,” InGraphics Hardware 2003, Jul. 2003, 9 pages.
Catmull, “A Subdivision Algorithm for Computer Display of Curved Surfaces,”Ph.D Thesis, Dept. of CS, U. of Utah, Dec. 1974, 84 pages.
Cook et al., “The Reyes Image Rendering Architecture,” InComputer Graphics, vol. 21, No. 4, Jul. 1987, pp. 95-102.
Cook, “Shade Trees,” InComputer Graphics, vol. 18, No. 3, Jul. 1984, pp. 223-231.
Deering et al., “The SAGE Graphics Architecture,” InACM Transactions on Graphics 21, 3 (Jul. 2002), pp. 683-692.
Goldfeather et al., “Quadratic Surface Rending on a Logic-Enhanced Frame-Buffer Memory,” InIEEE Computer Graphics and Applications 6, 1 (Jan. 1986), pp. 48-59.
Gu et al., “Geometry Images,” InACM Transactions on Graphics 21, 3 (Jul. 2002), pp. 355-361.
Hanrahan et al., “A Language for Shading and Lighting Calculations,” InComputer Graphics, vol. 24, No. 4, Aug. 1990, pp. 289-298.
Levoy et al., “The Use of Points as a Display Primitive,”Technical Report TR 85-22, The University of North Carolina at Chapel Hill, 1985, 19 pages.
Lien et al., “Adaptive Forward Differencing for Rendering Curves and Surfaces,” InComputer Graphics, .vol. 21, No. 4, Jul. 1987, pp. 111-118.
Loop et al., “Resolution Independent Curve Rendering Using Programmable Graphics Hardware,” InACM Transactions on Graphics(SIGGRAPH 2005 Proceedings), Jul. 2005, pp. 1000-1009.
McCool et al., “Shader Algebra,” InACM Transactions on Graphics, vol. 23, No. 3, Aug. 2004, pp. 787-795.
McCool et al., “Texture Shaders,” InProceedings of the ACM SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, 1999. pp. 117-126.
Molnar et al., “A Sorting Classification of Parallel Rendering,” InIEEE Computer Graphics and Applications 14, Jul. 4, 1994, 10 pages.
Molnar et al., “Pixelflow: High-Speed Rendering Using Image Composition,” InProceedings of the Siggraph 92, Computer Graphics, vol. 26, No. 2, Jul. 1992, pp. 231-240.
Newell, “The Utilization of Procedure Models in Digital Image Synthesis,” PhD thesis, Dept. of Computer Science, University of Utah, 1975, 109 pages.
Owens et al., “Polygon Rendering on a Stream Architecture,” InProceedings of the 2000 SIGGRAPH/EUROGRAPHICS Workshop on Graphics Hardware, Aug. 2000, pp. 23-32.
Perlin, “An image synthesizer,” InComputer Graphics(SIGGRAPH '85 Proceedings), vol. 19, No. 3, 1985, pp. 287-296.
Rhoades et al., “Real-Time Procedural Textures,” InComputer Graphics(1992 Symposium on Interactive 3D Graphics), vol. 25, 1992, pp. 95-100.
Rixner, et al., “A Bandwidth-Efficient Architecture for Media Processing,” InInternational Symposium on Microarchitecture, 1998, pp. 3-13.
Snyder et al., “Generative Modeling: A Symbolic System for Geometric Modeling,” InComputer Graphic, vol. 26, No. 2, Jul. 1992, pp. 369-378.
Whitted et al., A Software Test-Bed for the Development of 3-D Raster Graphics Systems, InComputer Graphics, vol. 15, No. 3, Aug. 1981, pp. 271-277.
Grossman et al., “Point Sample Rendering,” In Rendering Techniques '98, 1998, pp. 181-192.
Olano, “A Programmable Pipeline for Graphics Hardware,” PhD thesis, Dept. of Computer Science, The University of North Carolina at Chapel Hill, 1988, pp. 1-80.
Olano et al., “A Shading Language on Graphics Hardware: The PixelFlow Shading System,” Proceedings of the SIGGRAPH 98, Jul. 1998, pp. 1-10.
International Search Report and Written Opinion dated Apr. 23, 2007 for PCT/US06/25415 (filed Jun. 28, 2006), 11 pages.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Procedural graphics architectures and techniques does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Procedural graphics architectures and techniques, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Procedural graphics architectures and techniques will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3862023

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.