Non-volatile semiconductor memory and method for reading a...

Details Non-volatile semiconductor memory and method for reading a... Non-volatile semiconductor memory and method for reading a...

2007-06-19

2007-06-19

Auduong, Gene N. (Department: 2827)

Static information storage and retrieval

Read only systems

Resistive

C365S185050, C365S185130

Reexamination Certificate

active

11200504

ABSTRACT:
A method for reading a memory cell, wherein the memory cell comprises two source/drain regions and a gate, wherein the source/drain regions are each connected to a respective local bitline, and, wherein one of the source/drain regions of a neighboring memory cell is connected to one of the local bitlines, the other source/drain region of the neighboring memory cell being connected to another local bitline, comprising the steps of connecting the local bitline that connects the source/drain region of the memory cell and the source/drain region of the neighboring memory cell to a first global bitline, connecting the local bitline that connects the other source/drain region of the memory cell to a second global bitline, connecting the local bitline that connects the other source/drain region of the neighboring memory cell to one of a plurality of local power rails, applying a gate potential to the gate of the memory cell, applying a potential to the first global bitline and applying another potential to the second global bitline, and measuring the current flowing through the first global bitline.

REFERENCES:
patent: 5717636 (1998-02-01), Dallabora et al.
patent: 6262914 (2001-07-01), Smayling et al.
patent: 2001/0021126 (2001-09-01), Lavi et al.
patent: 2006/0146614 (2006-07-01), Lue et al.

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