Self-initializing frequency detector

Details Self-initializing frequency detector Self-initializing frequency detector

2007-02-27

2007-02-27

Pascal, Robert (Department: 2817)

Oscillators

Automatic frequency stabilization using a phase or frequency...

With reference oscillator or source

C331S014000, C331S016000, C331S017000, C331SDIG002, C327S156000, C375S376000

Reexamination Certificate

active

09175521

ABSTRACT:
A phase-locked loop (PLL) locks onto an input signal to provide an output signal that is proportional in frequency to the input signal. The PLL also detects whether an input signal's frequency falls outside a predetermined range and, whenever the input signal's frequency falls outside of range, the PLL provides a stable output signal at a predetermined frequency. While the PLL is providing a stable output signal in this manner it also monitors the input signal to determine whether the input signal's frequency has returned to within a re-qualification frequency range. If the input signal's frequency does fall within the re-qualification range, the PLL proceeds to lock onto the input signal.

REFERENCES:
patent: 4757279 (1988-07-01), Balzano
patent: 4853642 (1989-08-01), Otani et al.
patent: 5015971 (1991-05-01), Taylor et al.
patent: 5053724 (1991-10-01), Ogino et al.
patent: 5703538 (1997-12-01), Lo et al.
patent: 5719508 (1998-02-01), Daly
patent: 5903748 (1999-05-01), McCollogh et al.

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