High-efficiency saturating operator

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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10360831

ABSTRACT:
A method for determining, by means of a circuit, a result sk+2of an operation of the typesk+2=(sk⁢+•⁢ak)⁢+•⁢ak+1where sk, ak, and ak+1are fractional signed operands and symbol+•represents a saturating addition operation, comprising: a step of calculation of three sums representative of a possible value of the result, and a step of selection of one of said three sums according to overflows having occurred in the sum calculation. At least one step of the method uses the positive part and the negative part of at least one of the operands.

REFERENCES:
patent: 4215415 (1980-07-01), Kanemasa et al.
patent: 5847978 (1998-12-01), Ogura et al.
patent: 5889689 (1999-03-01), Alidina et al.
patent: 6182105 (2001-01-01), Kolagotla et al.
patent: 6209017 (2001-03-01), Lim et al.
patent: 6499046 (2002-12-01), Nguyen et al.
patent: 6519620 (2003-02-01), Nguyen et al.

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