Semiconductor chip stack

Details Semiconductor chip stack Semiconductor chip stack

2007-06-12

2007-06-12

Cao, Phat X. (Department: 2814)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S112000, C438S118000, C257S777000

Reexamination Certificate

active

11180039

ABSTRACT:
A the semiconductor chip stack in which an intermediate space between semiconductor chips is filled at least along one edge of the upper face of a top chip by a spacer composed of a polymer which can be structured photographically, of photoresist, of an encapsulation compound or an adhesive, and is sealed from the outside. During the passivating process, the connecting contact pads are kept free of the material of this spacer for bonding wires or other external connections on the upper face of the bottom chip.

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patent: 2003/0162324 (2003-08-01), Tomimatsu
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