Thin film transistor array panel and liquid crystal display...

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material

Reexamination Certificate

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Details

C257S072000, C257SE29273

Reexamination Certificate

active

10525039

ABSTRACT:
A gate wire including a gate line extending in a transverse direction and a gate electrode connected to the gate line is form on an insulating substrate. A storage capacitor wire including a storage capacitor electrode line extending in the transverse direction and a storage electrode connected to the storage capacitor electrode line and located at the edges of a pixel area is formed. A semiconductor layer is formed on a gate insulating film covering the gate wire and the storage capacitor wire. A data wire is formed on the gate insulating film or the semiconductor layer and includes a data line intersecting the gate line to define the pixel area, a source electrode connected to the data line and located on the semiconductor layer, a drain electrode formed on the semiconductor layer and located opposite the source electrode with respect to the gate electrode, and a first storage capacitor conductor overlapping the storage capacitor electrode via the gate insulating film to form a storage capacitor. A pixel electrode electrically connected to the drain electrode and the first storage capacitor conductor is formed on the protective layer covering the data wire.

REFERENCES:
patent: 5517342 (1996-05-01), Kim et al.
patent: 5703382 (1997-12-01), Hack et al.
patent: 5745200 (1998-04-01), Kikuchi et al.
patent: 6445003 (2002-09-01), Chang et al.
patent: 2002/0053701 (2002-05-01), Kong et al.
patent: 08-320503 (1996-12-01), None
patent: 2004-194823 (2004-07-01), None
patent: 97-28763 (1997-06-01), None
patent: 98-78722 (1997-11-01), None

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