Packet switch device

Multiplex communications – Pathfinding or routing – Through a circuit switch

Reexamination Certificate

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Reexamination Certificate

active

09805545

ABSTRACT:
Packets input from input HWs #0to #3to a packet switch device are buried in time slots A through D. The packet switch device alternately switches the input packets in units of time slots, and inputs the packets to two 4×4 switches. The 4×4 switches make normal switching, and distribute the packets to respective output ports. Then, the packets output from the two 4×4 switches after being switched are alternately multiplexed, and output to output HWs #0through #3. By making switching in units of packets as described above, a process overhead is prevented from being increased, and also expansion can be easily made. Besides, hardware scale can be made small.

REFERENCES:
patent: 5253251 (1993-10-01), Aramaki
patent: 5293378 (1994-03-01), Shimizu
patent: 6507584 (2003-01-01), Moriwaki et al.
patent: 2002/0131442 (2002-09-01), Garg et al.
patent: 0 918 419 (1999-05-01), None
patent: 07327036 (1995-12-01), None
patent: 11-154954 (1999-06-01), None

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