Static information storage and retrieval – Floating gate – Multiple values
Reexamination Certificate
2007-11-06
2007-11-06
Elms, Richard T. (Department: 2824)
Static information storage and retrieval
Floating gate
Multiple values
C365S185120, C365S185170, C365S185250
Reexamination Certificate
active
11443119
ABSTRACT:
A semiconductor integrated circuit device has a memory cell array including a plurality of pages and a page buffer. Each of the plurality of pages includes a user region and a page flag region in which page flag data indicative of a current state of a corresponding page is written. The page buffer includes a user page buffer section which temporarily holds the user data and a page flag page buffer section which temporarily holds the page flag data. The page flag data is recorded in the form of two levels in the non-volatile semiconductor memory cell arranged in the page flag region. The user data is recorded in the form of multilevel in the non-volatile semiconductor memory cell arranged in the user region.
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Arai Fumitaka
Iino Naohisa
Elms Richard T.
Kabushiki Kaisha Toshiba
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