Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-09-04

2007-09-04

Le, Thong Q. (Department: 2827)

Static information storage and retrieval

Addressing

Plural blocks or banks

C365S205000, C365S196000, C365S231000

Reexamination Certificate

active

10860111

ABSTRACT:
A semiconductor memory device is provided with a plurality of memory blocks including a plurality of word lines and a plurality of bit line pairs intersecting the individual word lines, a plurality of memory cells provided at each of intersections where the individual word lines intersect the bit line pairs, and a plurality of sense amplifiers respectively provided in correspondence with the bit line pairs. The semiconductor memory device further comprises common data bus line pairs each connected via switch transistors to the corresponding memory blocks, a read/write amplifier for performing a data read/write operation through the common data bus line pairs on the memory blocks, and an SRAM cell electrically connected via switch transistors to each common data bus line pair.

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Jan. 26, 2007 JP OA and English Translation (8 pp.).
Japanese Office Action dated May 22, 2007 (with English Translation).

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