Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2007-01-02
2007-01-02
Phung, Anh (Department: 2824)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185290, C365S218000
Reexamination Certificate
active
11081085
ABSTRACT:
An error correction code is applied and an erasing procedure is passed as accomplished, if a maximum number of single bit failures in compliance with a criterion of the error correction code is not exceeded.
REFERENCES:
patent: 5369615 (1994-11-01), Harari et al.
patent: 5615154 (1997-03-01), Yamada
patent: 5768192 (1998-06-01), Eitan
patent: 5841721 (1998-11-01), Kwon et al.
patent: 5920502 (1999-07-01), Noda et al.
patent: 5991206 (1999-11-01), Shin
patent: 6011725 (2000-01-01), Eitan
patent: 6046939 (2000-04-01), Noda et al.
patent: 6331951 (2001-12-01), Bautista, Jr. et al.
patent: 2004/0255225 (2004-12-01), Takai
patent: 2005/0041515 (2005-02-01), Futatsuyama et al.
Infineon Technologies Flash GmbH & Co. KG
Phung Anh
Slater & Matsil L.L.P.
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