Semiconductor package and fabrication method thereof

Details Semiconductor package and fabrication method thereof Semiconductor package and fabrication method thereof

2007-04-03

2007-04-03

Pert, Evan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

C438S107000, C438S617000, C438S109000, C257S784000, C257S787000, C257S724000, C257S686000

Reexamination Certificate

active

11041764

ABSTRACT:
A semiconductor package and a fabrication method thereof are proposed. A lead frame is provided between a chip and a substrate in a window ball grid array semiconductor package, wherein an active surface of the chip is electrically connected to the lead frame via bonding wires formed in an opening of the substrate and is electrically connected to the substrate via the lead frame. The provision of lead frame can improve the heat dissipating efficiency and electrical performances. The bonding wires located in the opening of the substrate eliminate the prior-art drawback of requiring different molds in response to different opening structures of a substrate.

REFERENCES:
patent: 4862245 (1989-08-01), Pashby et al.
patent: 6048755 (2000-04-01), Jiang et al.
patent: 6218731 (2001-04-01), Huang et al.
patent: 6847104 (2005-01-01), Huang et al.
patent: 2003/0034553 (2003-02-01), Ano

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