Method of forming sidewall spacer elements for a circuit...

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S230000, C438S303000

Reexamination Certificate

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10987466

ABSTRACT:
By heat treating a silicon dioxide liner prior to patterning a silicon nitride spacer layer, the etch selectivity of the silicon dioxide with respect to the silicon nitride is increased, thereby reducing or eliminating the problem of pitting through the silicon dioxide layer. This allows further scaling of the devices, wherein an extremely thin silicon dioxide liner is required to obtain an accurate lateral patterning of the dopant profile in the drain and source regions.

REFERENCES:
patent: 5013675 (1991-05-01), Shen et al.
patent: 5847428 (1998-12-01), Fulford et al.
patent: 6225231 (2001-05-01), Losavio
patent: 6448167 (2002-09-01), Wang et al.
patent: 6498067 (2002-12-01), Perng et al.

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