Signal isolation in a package substrate

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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Details

C257S670000, C257S678000, C257S684000, C257S690000, C257S698000, C257S700000, C257S702000, C257S707000, C257S734000, C257S736000, C257S789000

Reexamination Certificate

active

11146817

ABSTRACT:
Signal traces are patterned on a top surface of a substrate. A ground trace is patterned on the top surface of the substrate for at least one pair of the signal traces. A die paddle is patterned on the top surface of the substrate, and the die paddle is connected directly with the ground trace.

REFERENCES:
patent: 5708567 (1998-01-01), Shim et al.
patent: 6534859 (2003-03-01), Shim et al.
patent: 6791166 (2004-09-01), Foster
patent: 6803659 (2004-10-01), Suwa et al.
patent: 6853202 (2005-02-01), Chang et al.
patent: 6979897 (2005-12-01), Ma
patent: 7148554 (2006-12-01), Nah et al.
patent: 2002/0076919 (2002-06-01), Peters et al.
patent: 2002/0084524 (2002-07-01), Roh et al.
patent: 2003/0057545 (2003-03-01), Shim et al.
patent: 2003/0216024 (2003-11-01), Shim et al.
patent: 2004/0155322 (2004-08-01), Cho et al.
patent: 2004/0173896 (2004-09-01), Jiang et al.
patent: 2005/0077545 (2005-04-01), Zhao et al.
patent: 2005/0194698 (2005-09-01), Shim et al.

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