ESD protection circuit

Details ESD protection circuit ESD protection circuit

2007-01-16

2007-01-16

Sircus, Brian (Department: 2836)

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

C361S111000

Reexamination Certificate

active

10723965

ABSTRACT:
An ESD protection circuit for an integrated circuit includes an ESD clamping circuit, an ESD triggering circuit, and an ESD disabling circuit. The ESD clamping circuit is operably coupled to a first power pin of the integrated circuit and a second power pin of the integrated circuit. The ESD triggering circuit is operably coupled to the ESD clamping circuit, wherein, when enabled and when sensing an ESD event, the ESD triggering circuit provides a clamping signal to the ESD clamping circuit such that the ESD clamping circuit provides a low impedance path between the first and second power pins. The ESD disabling circuit is operably coupled to disable the ESD triggering circuit when the integrated circuit is in a normal operating mode.

REFERENCES:
patent: 5255146 (1993-10-01), Miller
patent: 5535086 (1996-07-01), Mentzer
patent: 5825603 (1998-10-01), Parat et al.
patent: 5877927 (1999-03-01), Parat et al.
patent: 5978192 (1999-11-01), Young et al.
patent: 6385021 (2002-05-01), Takeda et al.
patent: 6952333 (2005-10-01), Farrenkopf

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