High frequency binary phase detector

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By phase

Reexamination Certificate

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Details

C327S003000

Reexamination Certificate

active

10776074

ABSTRACT:
A phase detector includes a first flip flop having a data input coupled to a first clock signal at a first frequency and a clock input coupled to a second clock signal at a second frequency. The frequency of the first clock signal is a multiple of the frequency of the second clock signal. The phase detector also includes a second flip flop having a data input coupled to an output of the first flip flop and a clock input coupled to the second clock signal.

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Communication from the European Patent Office dated May 2, 2005; European Search Report for Application No. 04026609.
Lee, T. H., et al. “A 155-HZ Clock Recovery Delay—and Phase-Locked Loop.” IEEE Journal of Solid State Circuits, vol. 27., No. 12, Dec. 1, 1992, pp. 1736-1746.
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