Patent
1988-02-05
1989-09-19
Clawson, Jr., Joseph E.
357 20, 357 58, H01L 2702
Patent
active
048689211
ABSTRACT:
An integrated circuit with a substrate of one conductivity type and a drift layer on the substrate of opposite conductivity type includes a high voltage semiconductor device, such as a P-N diode, with a first main device region of the opposite conductivity type adjoining the drift layer and a second main device region of the same conductivity type as the substrate adjoining the drift layer. The high voltage semiconductor device is electrically isolated from other devices through the incorporation into the integrated circuit of an isolation region adjoining the substrate and surrounding the high voltage device. Electrical isolation of the high voltage device from the substrate is achieved by interposing a highly-doped buried layer of the opposite conductivity type between the second main device region and the substrate so as to prevent current carrier injection from the second main device region into the substrate. A field gate is included in the high voltage device, being insulatingly spaced from the drift layer, situated between the buried layer and the first main device region, and electrically shorted to the second main device region. The field gate prevents the buried layer from rising dangerously high in voltage while the device is in a reverse blocking mode by pinching off current flow in the drift layer that would otherwise raise the voltage of the buried layer. Consequently, avalance breakdown between the buried layer and the above-situated second main device region is avoided.
REFERENCES:
patent: 4409606 (1983-10-01), Wagenaar et al.
patent: 4422089 (1983-12-01), Vaes et al.
patent: 4494134 (1985-01-01), Wildi et al.
Clawson Jr. Joseph E.
Davis Jr. James C.
General Electric Company
Ochis Robert
Snyder Marvin
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