Page buffer circuit with reduced size, and flash memory...

Details Page buffer circuit with reduced size, and flash memory... Page buffer circuit with reduced size, and flash memory...

2007-04-03

2007-04-03

Mai, Son L. (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185030, C365S185280, C365S185330, C365S189050

Reexamination Certificate

active

11164612

ABSTRACT:
The present invention relates to a page buffer circuit with a reduced size, and a flash memory device having the page buffer circuit and program operation method thereof. According to the present invention, a page buffer circuit can perform a program operation of a Multi-Level Cell (MLC) using a data verify circuit even without a data compare circuit. Accordingly, an occupation area can be reduced and the size of a flash memory device can also be reduced.

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patent: 2006/0018152 (2006-01-01), Kawai

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