System, method, and apparatus for division coupled with...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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C708S551000

Reexamination Certificate

active

10414842

ABSTRACT:
A system, method, and apparatus for efficient rounding of signed numbers is presented herein. If the divisor is positive, the dividend is added to one half of the magnitude of the divisor. If the divisor is negative, the complement of the dividend is added to one half of the magnitude of the divisor. If the dividend is negative, and the divisor is also negative, one is added to the sum of the inverted dividend and one-half of the magnitude of the divisor. If the dividend is negative and the divisor is positive, one is subtracted from the sum of the dividend and one-half the magnitude of the divisor. The result is then right shifted x times. If the signs of the divisor and dividend are different, a most-significant-bit(sign-bit) of the result is shifted in as the most significant bit during each right shift. Otherwise, a “0” is shifted in.

REFERENCES:
patent: 5107453 (1992-04-01), Nomura
patent: 5365471 (1994-11-01), Sato
patent: 5696713 (1997-12-01), Kovacs
patent: 5754460 (1998-05-01), Tam

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