Electronic parts packaging structure and method of...

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor

Reexamination Certificate

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C257S758000

Reexamination Certificate

active

07084006

ABSTRACT:
There are provided the steps of forming a wiring pattern in an area except packaging area on a mounted body, the package area in which electronic parts is mounted, mounting the electronic parts in the packaging area of the mounted body to direct a surface of the electronic parts, of which a connection terminal is formed, upward, and forming an insulating film which covers the electronic parts and the wiring pattern.

REFERENCES:
patent: 6169325 (2001-01-01), Azuma et al.
patent: 6309912 (2001-10-01), Chiou et al.
patent: 6319754 (2001-11-01), Wang et al.
patent: 6396143 (2002-05-01), Kimbara et al.
patent: 2001/0008794 (2001-07-01), Akagawa
patent: 2002/0053730 (2002-05-01), Mashino
patent: 0 607 656 (1994-07-01), None
patent: 2001-196525 (2001-07-01), None
patent: 2001-274034 (2001-10-01), None

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