Raster operation device

Communications: electrical – Land vehicle alarms or indicators – Internal alarm or indicator responsive to a condition of the...

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Details

340748, 340750, G09G 106

Patent

active

048685534

ABSTRACT:
Disclosed is a raster operation device including a word boundary checking circuit which operates on a hardware basis to check as to whether the writing of data across the word boundary of frame buffer occurs, basing on the shift width, bit width, etc. of data to be written from CPU to frame buffer; an address generation circuit which operates on a hardware basis to provide the frame buffer with the next address adjacent in the word boundary direction to the address of frame buffer specified for writing by the CPU; and a sequence control circuit which operates on a hardware basis to control in read-modify-write mode the writing of data in the address specified by the CPU when the writing data is found not to cross the word boundary, or to control in read-modify-write mode the writing of data in the address specified by the CPU and, thereafter, control in read-modify-write mode the writing of bit data which has been left unwritten in the address specified by the CPU into the next address adjacent in the word boundary direction issued by the address generation circuit, basing on a single writing instruction issued by the CPU to the frame buffer.

REFERENCES:
patent: 4107786 (1978-08-01), Masaki et al.
patent: 4283724 (1981-08-01), Edwards
patent: 4367533 (1983-01-01), Wiener
patent: 4682161 (1987-07-01), Bugg
"256K Graphic Dual-Port Memory Incorporating, Raster Operation Function and Serial Input Function", Nikkei Electronics, pp. 243-264, 3-86.

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