Method of erasing NAND flash memory device

Static information storage and retrieval – Floating gate – Particular biasing

Reexamination Certificate

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C365S185270, C365S185230

Reexamination Certificate

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07095656

ABSTRACT:
Provided is concerned with a method of erasing a NAND flash memory device, capable of restraining an erasing disturbance fail arising from a deselected cell block and improving a product yield of the device by applying a negative voltage to a well of a high voltage transistor forming an X-decoder during an erasing operation in the NAND flash memory device.

REFERENCES:
patent: 5640123 (1997-06-01), Akaogi et al.
patent: 5659505 (1997-08-01), Kobayashi et al.
patent: 6044017 (2000-03-01), Lee et al.
patent: 2005/0248993 (2005-11-01), Lee et al.

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