Cache memory with an updatable address storing unit

Details Cache memory with an updatable address storing unit Cache memory with an updatable address storing unit

1994-09-12

1997-04-15

Teska, Kevin J.

G06F 1208

Patent

active

056219113

ABSTRACT:
A cache memory is provided with an address information storing unit for storing a register value register value, for example, contents of a program counter PC, a stack pointer SP or the like. When the cache memory is built in a microprocessor having a function of accessing to an external memory with a value of the register used for accessing to an external memory, the address information storing unit is updated by the high-order digits of the aforementioned register such as the stack pointer SP, the program counter PC or the like.

REFERENCES:
patent: 4942520 (1990-07-01), Langendorf
patent: 5014195 (1991-05-01), Farrell et al.
patent: 5067078 (1991-11-01), Talgan et al.
patent: 5091851 (1992-02-01), Shelton et al.
patent: 5136700 (1992-08-01), Thacker
patent: 5150471 (1992-09-01), Tipon et al.
patent: 5155832 (1992-10-01), Hunt

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