Semiconductor device manufacturing: process – Chemical etching
Reexamination Certificate
2006-02-28
2006-02-28
Norton, Nadine G. (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
C438S706000, C438S719000, C438S723000, C438S724000, C438S740000, C438S743000, C438S744000, C438S756000, C438S757000, C438S960000
Reexamination Certificate
active
07005380
ABSTRACT:
A semiconductor device manufacturing method is provided where a device structure is formed on top of a wafer that comprises a backside semiconductor substrate, a buried insulator layer and a top semiconductor layer. Then, an etch stop layer is formed upon the wafer that carries the device structure, and a window is formed in the etch stop layer. Further, a dielectric layer is formed upon the etch stop layer that has the window. Then, a first contact hole through the dielectric layer and the window down to the backside semiconductor substrate is simultaneously etched with at least one second contact hole through the dielectric layer down to the device structure. The wafer may be a silicon-on-insulator (SOI) wafer, and the etch stop layer and the dielectric layer may be formed by depositing silicon oxynitride and tetraethyl orthosilicate (TEOS), respectively. The device structure may be a CMOS transistor structure.
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Aminpur Massud
Burbach Gert
Zistl Christian
Advanced Micro Devices , Inc.
Chen Eric B.
Norton Nadine G.
Williams Morgan & Amerson P.C.
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