Stabilized noise shaper of a small scale having a suppressed qua

Pulse or digital communications – Receivers – Interference or noise reduction

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375229, 375247, 341143, H04B 110

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active

054208920

ABSTRACT:
In a noise shaper comprising integrators of three or more stages, a quantizer and a feedback circuit, there are provided a circuit for subtracting from an output of each of the integrators a result obtained by delaying the output of the same integrator by one sample and multiplying it by a constant number, so as to output the result of the subtraction to an integrator at the subsequent stage, and a circuit for feeding back a result obtained by delaying an output of the quantizer by one sample and multiplying it by any constant number value, to an input of each of the integrators.

REFERENCES:
patent: 4937577 (1990-06-01), Rich et al.
patent: 5055843 (1991-10-01), Ferguson, Jr. et al.
patent: 5073777 (1991-12-01), Fukuhara et al.
patent: 5101205 (1992-03-01), Yasuda
IEEE 1988 Custom Integrated Circuits Conference, "A 13 bit ISDN-based Over-sampled ADC using Two-Stage Third Order Noise Shaping", by Longo, et al., pp. 21.2.1-21.2.4.
IEEE Transactions on Circuits & Systems, vol. 37, No. 3, Mar. 1990, Chao, et al., "A Higher Order Topology for Interpolative Modulators for Oversampling A/D Coverters", pp. 309-318.

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