Frequency divider for RF transceiver

Details Frequency divider for RF transceiver Frequency divider for RF transceiver

2006-02-07

2006-02-07

Le, Dinh T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Frequency or repetition rate conversion or control

C377S111000, C377S108000

Reexamination Certificate

active

06995589

ABSTRACT:
A frequency divider for dividing a frequency of a clock signal by an odd divisor includes a flip-flop chain for latching signals having a number of flip-flops equal to the divisor. The frequency divider also has an XOR gate having two input nodes and an output node, one input node being electrically connected to the clock signal, the other input node being electrically connected to an inverted output node of the last flip-flop, and the output node of the XOR gate being electrically connected to clock input nodes of the odd flip-flops in the flip-flop chain. The frequency divider further has an inverter, an input node of the inverter being electrically connected to the output node of the XOR gate, an output node of the inverter being electrically connected to clock input nodes of the even flip-flops in the flip-flop chain.

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Magoo et al.;“RF Local Oscillator Path for GSM Direct Conversion Transceiver with True 50% Duty Cycle Divide by Three and Active Third Harmonic Cancellation”;Conexant Systems Inc., Newport Beach, CA92604,USA;2002 IEEE Radio Frequency Integrated Circuits Symposium; ISBN 0780372468.

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