Boots – shoes – and leggings
Patent
1993-09-30
1995-05-30
Cosimano, Edward R.
Boots, shoes, and leggings
36518909, 365226, G11C 1602
Patent
active
054207983
ABSTRACT:
A voltage detection circuit for preventing the erasing and programming of a nonvolatile memory device during power up and power down sequences. A power source is coupled to the high voltage input and the low voltage input to provide a reference voltage in response to the greater of the high voltage input or the low voltage input. A low voltage detector is coupled to the low voltage input and the reference voltage and has circuitry to provide a first not-ready signal when the voltage on the low voltage input falls below a predetermined low voltage threshold. A high voltage detector is coupled to the high voltage input, the reference voltage, and the output of the low voltage detector and has circuitry to provide a second not-ready signal when either the first not-ready signal is received or the voltage on the high voltage input falls below a predetermined high voltage threshold. The not-ready signals prevent erasing or programming operations to occur in the nonvolatile memory device.
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Lin Tien-Ler
Yiu Tom D.
Cosimano Edward R.
Macronix International Co. Ltd.
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