PLL manufacturing test apparatus

Electricity: measuring and testing – Measuring – testing – or sensing electricity – per se – Frequency of cyclic current or voltage

Reexamination Certificate

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C327S157000, C331S17700V

Reexamination Certificate

active

07061223

ABSTRACT:
A method and an apparatus for testing a phase-locked loop (PLL) are provided. A fixed-level reference clock signal and a test feedback clock signal are applied to a phase-frequency detector (PFD) of the PLL to measure a minimum output frequency of a voltage-controlled oscillator (VCO) of the PLL. A test reference clock signal and a fixed-level feedback clock signal are applied to the PFD to measure a maximum output frequency of the VCO. The lock and capture range of the PLL is determined based on the maximum and minimum frequencies of the VCO.

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patent: 6657917 (2003-12-01), Lever
patent: 2003/0071748 (2003-04-01), Huang et al.

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