Conductor line stack having a top portion of a second layer...

Details Conductor line stack having a top portion of a second layer... Conductor line stack having a top portion of a second layer...

2006-02-28

2006-02-28

Mai, Anh Duy (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S296000, C257S413000

Reexamination Certificate

active

07005744

ABSTRACT:
A structure and method are provided for a conductor line stack of an integrated circuit. The conductor line stack includes a layer of a first material such as heavily doped polysilicon or a metal silicide. A layer of a second material such as a metal is formed over the layer of first material, the layer of second material having an upper portion and a lower portion. A pair of first spacers is disposed on sidewalls of the upper portion, wherein the lower portion has width defined by a combined width of the upper portion and the pair of first spacers. A pair of second spacers is formed on sidewalls of the first spacers, the lower portion and the layer of first material. The conductor line stack structure is well adapted for formation of a borderless bitline contact in contact therewith.

REFERENCES:
patent: 4906589 (1990-03-01), Chao
patent: 4907048 (1990-03-01), Huang
patent: 5053849 (1991-10-01), Izawa et al.
patent: 5061647 (1991-10-01), Roth et al.
patent: 5146291 (1992-09-01), Watabe et al.
patent: 5175119 (1992-12-01), Matsutani
patent: 5241203 (1993-08-01), Hsu et al.
patent: 5256585 (1993-10-01), Bae
patent: 5276347 (1994-01-01), Wei et al.
patent: 5368686 (1994-11-01), Tatsumi et al.
patent: 5374575 (1994-12-01), Kim et al.
patent: 5502336 (1996-03-01), Park et al.
patent: 5521115 (1996-05-01), Park et al.
patent: 5643833 (1997-07-01), Tsukamoto
patent: 5986305 (1999-11-01), Wu
patent: 5994192 (1999-11-01), Chen
patent: 6001719 (1999-12-01), Cho et al.
patent: 6180474 (2001-01-01), Kim
patent: 6235621 (2001-05-01), Jeng et al.
patent: 6245620 (2001-06-01), Jang et al.
patent: 6261933 (2001-07-01), Hakey et al.
patent: 6274441 (2001-08-01), Mandelman et al.
patent: 6319840 (2001-11-01), Costrini et al.
patent: 6331478 (2001-12-01), Lee et al.
patent: 6342450 (2002-01-01), Lattard
patent: 6426247 (2002-07-01), Divakaruni et al.
patent: 6437411 (2002-08-01), Choi et al.
patent: 6660581 (2003-12-01), Yang et al.
patent: 6674139 (2004-01-01), Mandelman et al.
patent: 6723623 (2004-04-01), Nguyen
patent: 6730552 (2004-05-01), Abadeer et al.
patent: 6740550 (2004-05-01), Choi et al.
patent: 6878613 (2005-04-01), Stottko et al.
patent: 6885052 (2005-04-01), Ahn et al.
patent: 2001/0038113 (2001-11-01), Bronner et al.
patent: 2001/0046737 (2001-11-01), Ahn et al.
patent: 2002/0055224 (2002-05-01), Mandelman et al.
patent: 2002/0072156 (2002-06-01), Lee et al.
patent: 2004-146839 (2004-05-01), None
D.S. Wen et al., A Self-Aligned Inverse-T Gate Fully Overlappsed LDD for Sub-Half Micron CMOS. IEDM 1989, pp. 765-768.
J.R. Pfiester et al., A Self-Aligned LDD/Channel Implanted ITLDD Process with Selectively-Deposited Poly Gates for CMOS VLSI. IEDM 1989, pp. 769-772.

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