Memory device for improved reference current configuration

Details Memory device for improved reference current configuration Memory device for improved reference current configuration

2006-10-17

2006-10-17

Zarabian, Amir (Department: 2827)

Static information storage and retrieval

Floating gate

Particular biasing

C365S207000

Reexamination Certificate

active

07123514

ABSTRACT:
A memory device is composed of a memory array including floating gate memory cells; a sense amplifier designed to identify data stored in the memory array; and a reference current setting unit responsive to a trimming code for providing a reference current for the sense amplifier. The trimming code is defined as being all-0 for a reference current level to identify data stored in the memory array as logic “1”, and is defined as being all-1 for a reference current level to identify data stored in the memory array as logic “0”.

REFERENCES:
patent: 2002/0153917 (2002-10-01), Tanaka et al.
patent: 2003/0076139 (2003-04-01), Miyagawa et al.
patent: 2005/0094472 (2005-05-01), Ishikawa et al.
patent: 2000-132986 (2000-05-01), None

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