Shallow trench isolation void detecting method and structure...

Details Shallow trench isolation void detecting method and structure... Shallow trench isolation void detecting method and structure...

2006-08-29

2006-08-29

Pham, Thanhha (Department: 2813)

Semiconductor device manufacturing: process

With measuring or testing

C438S018000

Reexamination Certificate

active

07098049

ABSTRACT:
Disclosed is a method for detecting STI void of a semiconductor wafer. The method of the present invention comprises steps of assigning a detecting area in a predetermined region of the wafer; forming active areas and gate strips crossing the active areas by the process synchronized with that for other regions of the wafer. Dielectric material is filled between the active areas. The adjacent portion between the active areas reaches a predetermined length at least. The electrical value of the gate strips is measured to determine whether there is any void in the dielectric filled between the active areas, thereby to derive whether there is any void generated in the STI between the active areas of the other regions of the wafer.

REFERENCES:
patent: 5889410 (1999-03-01), El-Kareh et al.
patent: 6714031 (2004-03-01), Seki
patent: 2003/0034489 (2003-02-01), Bhattacharya et al.
patent: 2005/0095727 (2005-05-01), Chang et al.

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