Microprogram data processing technique and apparatus

Details Microprogram data processing technique and apparatus Microprogram data processing technique and apparatus

1974-09-25

1977-08-16

Thomas, James D.

Boots, shoes, and leggings

G06F 916, G06F 1300

Patent

active

040429725

ABSTRACT:
A microprogrammed processor in which control signals for data paths, the ALU function, the shifter and all other control signals are derived from the current microprogram control word which is normally periodically clocked into a ROM buffer. The processor provides for microbranching capability with and/or without a test, testing capabilities including direct addressing with simultaneous temporary address storage capability for future recall, and selective testing of computer instruction bits for decoding to address the next micro-instruction. Additional capabilities provide for flexible access to the micro-code instruction control store through a ROM address multiplexer which allows for selection of at least one of four possible micro-instruction addresses determined by micro-code control decode logic. The above functions are accomplished with a fifty-six bit micro-instruction format implemented with a sixteen bit word length, which allows for a flexible instruction set for a microprogrammed processor enabling a system to be designed to span the range from a minicomputer to a large processor.

REFERENCES:
patent: 3344410 (1967-09-01), Collins et al.
patent: 3543245 (1970-11-01), Nutter
patent: 3646522 (1972-02-01), Furman
patent: 3657705 (1972-04-01), Mekota, Jr. et al.
patent: 3707703 (1972-12-01), Sakai
patent: 3739352 (1973-06-01), Packard
patent: 3766532 (1973-10-01), Liebel, Jr.
patent: 3953833 (1976-04-01), Shapiro

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