Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing
Reexamination Certificate
2006-02-28
2006-02-28
Maung, Zarni (Department: 2151)
Electrical computers and digital processing systems: multicomput
Computer-to-computer protocol implementing
C709S231000, C709S238000
Reexamination Certificate
active
07007095
ABSTRACT:
A method and apparatus for transmitting unscheduled flow control, in packet form, between two chips are described. In one embodiment, a method includes reading a status of a buffer used to receive network packets transmitted from a different chip. The method further includes transmitting to said different chip an unscheduled flow control packet including information about the status of the buffer.In an embodiment, a chip includes a packet buffer to store network packets transmitted from a different chip, wherein the packet buffer is associated with one or more of a plurality of ports through which the network packets travel. The chip also includes control circuitry, coupled with a packet data bus to receive said network packets from the different chip, and coupled with an unscheduled flow control packet bus to generate and transmit unscheduled flow control packets to the different chip, wherein the unscheduled flow control packets contain information relating to the packet buffer.
REFERENCES:
patent: 5400329 (1995-03-01), Tokura et al.
patent: 6098103 (2000-08-01), Dreyer et al.
patent: 6167029 (2000-12-01), Ramakrishnan
patent: 6421352 (2002-07-01), Manaka et al.
patent: 6438597 (2002-08-01), Mosberger et al.
patent: 6483822 (2002-11-01), Lioy et al.
patent: 6671758 (2003-12-01), Cam et al.
patent: 6724725 (2004-04-01), Dreyer et al.
patent: 6754179 (2004-06-01), Lin
patent: 6795881 (2004-09-01), Bachrach
patent: 6816465 (2004-11-01), Barsoum et al.
patent: 6850523 (2005-02-01), Karr et al.
patent: 6850526 (2005-02-01), Tan et al.
patent: 2002/0122386 (2002-09-01), Calvignac et al.
patent: 2002/0126704 (2002-09-01), Cam et al.
patent: 2003/0184458 (2003-10-01), Calvignac et al.
PCT/US02/39468 International Search Report, Dec. 9, 2002.
Cam, Richard, et al., “System Packet Interface Level 4 (SPI-4) Phase 2: OC-192 System Interface for Physical and Link Layer Devices,” SPI-4 Phase 2 Implementation Agreement, Optical Internetworking Forum, OIF-PLL-04.0, pp. 1-59, Jan., 2001.
Data Transfer Case Study: TCP, http://www-net.cs.umass.edu/cs653-1997
otesch5/ch5-3.html, pp. 1-6, Sep. 12, 2001.
POS-PHY Level 4, A Saturn Packet and Cell Interface Specification for OCI92 SONET/SDH and 10 Gigabit Ethernet, Interface Specification PMC-1991635, PMC-Sierra, Inc., Issue 6, pp. 1-49, Feb., 2001.
PCT/US02/39468, Dec. 9, 2002, Preliminary Examination Report.
Chen Edmund G.
Cherukuri Ravikrishna
Wadhawan Ruchi
Blakely , Sokoloff, Taylor & Zafman LLP
Maung Zarni
Nguyen Van Kim T.
Redback Networks Inc.
LandOfFree
Method and apparatus for unscheduled flow control in packet... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and apparatus for unscheduled flow control in packet..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and apparatus for unscheduled flow control in packet... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3649519