Active solid-state devices (e.g. – transistors – solid-state diode – Bipolar transistor structure
Reexamination Certificate
2006-08-08
2006-08-08
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Bipolar transistor structure
C257S571000, C257S575000, C257S586000
Reexamination Certificate
active
07087979
ABSTRACT:
The intrinsic base region of a bipolar transistor is formed to avoid a chemical interaction between the chemicals used in a chemical mechanical polishing step and the materials used to form the base region. The method includes the step of forming a trench in a layer of epitaxial material. After this, a base material that includes silicon and germanium is blanket deposited, followed by the blanket deposition of a layer of protective material. The layer of protective material protects the base material from the chemical mechanical polishing step.
REFERENCES:
patent: 4564997 (1986-01-01), Matsuo et al.
patent: 5077227 (1991-12-01), Kameyama et al.
patent: 5187554 (1993-02-01), Miwa
patent: 5298786 (1994-03-01), Shahidi et al.
patent: 5320972 (1994-06-01), Wylie
patent: 5323032 (1994-06-01), Sato et al.
patent: 5362669 (1994-11-01), Boyd et al.
patent: 5389561 (1995-02-01), Gomi
patent: 5508213 (1996-04-01), Van Der Wel et al.
patent: 5508553 (1996-04-01), Nakamura et al.
patent: 5548156 (1996-08-01), Miwa et al.
patent: 5557131 (1996-09-01), Lee
patent: 5648280 (1997-07-01), Kato
patent: 5897359 (1999-04-01), Cho et al.
patent: 5994196 (1999-11-01), Seog
patent: 5994747 (1999-11-01), Wu
patent: 6171936 (2001-01-01), Fitzgerald
patent: 6235601 (2001-05-01), Kim
patent: 6333235 (2001-12-01), Lee et al.
patent: 6337251 (2002-01-01), Hashimoto
patent: 6352907 (2002-03-01), Gris
patent: 6426265 (2002-07-01), Chu et al.
patent: 6468871 (2002-10-01), Naem
patent: 6528861 (2003-03-01), Naem
patent: 6633069 (2003-10-01), Nii et al.
patent: 0779663 (1997-06-01), None
patent: 02260430 (1990-10-01), None
patent: 04082268 (1992-03-01), None
patent: 06318602 (1994-11-01), None
C.A. King et al., “Very Low Cost Graded SiGe Base Bipolar Transistors for a High-Performance Modular BiCMOS Process”, IEDM, 1999, pps. 565-568.
Wim van der Wel et al., “Poly-Ridge Emitter Transistor (PRET): Simple Low-Power Option to a Bipolar Process”, IEDM, 1993, pps. 453-456.
Asanga H. Perera et al., “Influence of Back-End Thermal Processing on Polysilicon-Monosilicon Contact Resistance Due to Dopant Deactiviation”, Proc. of the Bipolar/BiCMOS Circuits and Technology Meeting, 1994, pps. 242-245.
M. Racanelli et al., Contact Technology for High Performance Scalable BiCMOS on TFSOI, IEEE Electron Device Letters, vol. 16, No. 10, Oct. 1995, pps. 424-426.
IBM Technical Disclosure Bulletin, “Epi-Based Bipolar Transistor With Oxide-Defined Collector Window”, vol. 34, No. 1, Jun. 1991, pps. 422-424.
National Semiconductor Corporation
Pickering Mark C.
Wojciechowicz Edward
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