Memory architecture and method of manufacture and operation...

Static information storage and retrieval – Interconnection arrangements

Reexamination Certificate

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C365S153000, C365S182000

Reexamination Certificate

active

07050319

ABSTRACT:
An architecture, and its method of formation and operation, containing a high density memory array of semi-volatile or non-volatile memory elements, including, but not limited to, programmable conductive access memory elements. The architecture in one exemplary embodiment has a pair of semi-volatile or non-volatile memory elements which selectively share a bit line through respective first electrodes and access transistors controlled by respective word lines. The memory elements each have a respective second electrode coupled thereto which in cooperation with the bit line access transistors and first electrode, serves to apply read, write and erase signals to the memory element.

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