Dual gate multi-bit semiconductor memory

Details Dual gate multi-bit semiconductor memory Dual gate multi-bit semiconductor memory

2006-10-31

2006-10-31

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185140

Reexamination Certificate

active

07130221

ABSTRACT:
A method for altering and reading the contents of a memory cell includes the steps of: applying programming voltages to a first control gate and to a second control gate to cause carriers to be injected and trapped in either a first charge trapping region or in a second charge trapping region; applying erasing voltages to the first control gate and to the second control gate to cause the trapped carriers to be removed from the first charge trapping region and/or the second charge trapping region; and applying a sequence of reading voltages to the first control gate and to the second control gate for determining a state of each of the first and the second charge trapping regions.

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