Method of improving lock acquisition times in systems with a...

Details Method of improving lock acquisition times in systems with a... Method of improving lock acquisition times in systems with a...

2006-10-17

2006-10-17

Callahan, Timothy P. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C331S034000

Reexamination Certificate

active

07123065

ABSTRACT:
The present invention adds an additional feedback loop to a phase locked loop (PLL). The additional feedback loop detects if the actual output frequency of the PLL is above or below the desired output frequency. If the actual output frequency is above the desired output frequency a signal is added to the forward path of the PLL to decrease the frequency of the PLL oscillator. If the actual output frequency is below the desired output frequency a signal is added to the forward path of the PLL to increase the frequency of the PLL oscillator.

REFERENCES:
patent: 4590440 (1986-05-01), Haque et al.
patent: 5436597 (1995-07-01), Dunlap et al.
patent: 6188739 (2001-02-01), Everitt et al.
patent: 6853254 (2005-02-01), Li

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