Apparatus, method and digital-to-analog converter for...

Coded data generation or conversion – Converter compensation

Reexamination Certificate

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C341S120000, C341S145000

Reexamination Certificate

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07061412

ABSTRACT:
An apparatus, method and digital-to-analog converter (DAC) for reducing harmonic error power is provided, suitable for current-mode self-calibration DAC. Unit currents are calibrated one by one based on a reference value and the error distribution of the unit currents appears identical characteristic. According to the calibrated current error distribution, a shift shifts the input digital signal so that the error distribution of the unit current selected by the digital signal is monotonicity and not related to self-calibration current period. A coarse decoder decodes the digital signal as compensation decoding. The harmonic power related to the self-calibration current period is greatly reduced, which improves the signal to noise ratio.

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patent: 6707404 (2004-03-01), Yilmaz
patent: 6927714 (2005-08-01), Teterwak
patent: 6967609 (2005-11-01), Bicakci et al.
patent: WO 03/100982 (2003-12-01), None

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