Stencil mask design method and under bump metallurgy for C4...

Details Stencil mask design method and under bump metallurgy for C4... Stencil mask design method and under bump metallurgy for C4...

2006-11-14

2006-11-14

Nhu, David (Department: 2818)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Making plural separate devices

C438S108000

Reexamination Certificate

active

07135355

ABSTRACT:
A method for the fine-pitch stencil mask design for stencil printing bumping technology for eutectic Sn/Pb and lead-free solder material is described. In the method, a reflowing enhancement layer is introduced to improve the solder quality and reduce the pitch of solder bumps. The method of forming the layer is described as well as the forming method of matching under-bump metallurgy layer. The method of stencil mask design can match various sizes and pitch of the solder bumps. The designed mask is fixed on the stencil printer to deposit the solder materials with the required patterns. This method can increase the solder paste volume to increase the height of solder bumps after the reflowing process.

REFERENCES:
patent: 5470787 (1995-11-01), Greer
patent: 5937320 (1999-08-01), Andricacos et al.
patent: 6107180 (2000-08-01), Munroe et al.
patent: 6664176 (2003-12-01), Hedler et al.

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