Static information storage and retrieval – Floating gate – Particular biasing
Reexamination Certificate
2006-02-14
2006-02-14
Tran, M. (Department: 2827)
Static information storage and retrieval
Floating gate
Particular biasing
C365S185220
Reexamination Certificate
active
06999345
ABSTRACT:
A method and circuit for verify and read of a nonvolatile memory cell without the use of a reference cell is described. The circuit comprises a sense amplifier that compares a voltage from the output of a read path of a selected bit line to a reference voltage. When the selected memory cell is erased, the bit line voltage is small pulling down the read path voltage below the reference voltage, which causes a sense amplifier output that is a logical “0”. When the selected cell has been programmed, the raise of the bit line voltage causes the bit line to be decoupled from the output of the read path. The read path output then continues to charge to a voltage higher than the reference voltage resulting in a logical “1” at the output of the sense amplifier.
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Ogura Tomoko
Park Ki-Tae
Ackerman Stephen B.
Halo LSI, Inc.
Saile George O.
Tran M.
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