Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2006-02-07
2006-02-07
Chang, Kent (Department: 2675)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S087000, C178S018110
Reexamination Certificate
active
06995743
ABSTRACT:
A liquid crystal device includes a front electrode layer, a rear electrode layer, and a liquid crystal material located between the front electrode layer and the rear electrode layer. A first and second transistor each includes three terminals. The first transistor is a photo transistor. The first terminal of the first transistor electrically interconnected to a conductive electrode free from additional electrical elements therebetween. The second terminal of the first transistor is electrically interconnected to the conductive electrode free from additional electrical elements therebetween and the second terminal of the first transistor is maintained at the same potential as the conductive electrode. The first terminal of the first transistor and the second terminal of the first transistor electrically interconnected to one another free from additional electrical elements therebetween and the first terminal of the first transistor and the second terminal of the first transistor are maintained at the same potential. The second terminal of the first transistor is a gate of the first transistor. The third terminal of the first transistor electrically interconnected to the first terminal of the second transistor free from additional electrical elements therebetween and maintained at the same potential. The second transistor provides a readout function for the circuit. The second terminal of the second transistor electrically connected to one of the select electrodes. The second terminal of the second transistor is a gate of the second transistor. The third terminal of the second transistor is electrically interconnected to a readout system. The second transistor is substantially inhibited from receiving ambient light thereon. The first transistor is not substantially inhibited from receiving ambient light thereon. The first transistor and the second transistor being together with the rear electrode layer. The readout system determines a region of the device that experiences a change in the light level impinging on the device.
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patent
Abileah Adiel
Boer Willem den
Chang Kent
Chernoff Vilhauer & McClung & Stenzel
Planar Systems Inc.
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