Method of making vertical inverter

Details Method of making vertical inverter Method of making vertical inverter

1988-02-16

1988-11-29

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 56, 437 57, 437 67, 437200, 437203, 437 41, H01L 2706, H01L 2136

Patent

active

047881585

ABSTRACT:
One embodiment of the present invention includes a vertical inverter. A layer of P-type material is formed on the surface of an N+-type substrate, followed by formation of an N+ layer, a P+ layer, an N- layer and a P+ layer. (Of course different doping configurations may be used and remain within the scope of the invention.) A trench is then etched along one side of the stack thus formed and a connector is formed to the middle P+ and N+ layers. Another trench is then formed where a gate insulator and a- gate are formed. The gate serves as the gate for both the N-channel and P-channel transistors thus formed.

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patent: 4554570 (1985-11-01), Jastrzebski et al.
patent: 4554572 (1985-09-01), Chatterjee
patent: 4566025 (1986-01-01), Jastrzebski et al.
patent: 4670768 (1987-06-01), Sunami et al.

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