Oscillators – Automatic frequency stabilization using a phase or frequency... – Particular error voltage control
Reexamination Certificate
2006-05-09
2006-05-09
Mis, David (Department: 2817)
Oscillators
Automatic frequency stabilization using a phase or frequency...
Particular error voltage control
C331S00100A, C331S025000, C331S057000, C327S155000, C327S262000
Reexamination Certificate
active
07042296
ABSTRACT:
The method and circuit of the present invention compensates a timing change over PVT variations without adverse impact on the system. The method and circuit uses two digital programmable delay circuits which have a Master/Slave relationship. The master programmable delay circuit tracks a delay over PVT and readjusts the delay whenever there is a need for calibration due to PVT variations. The slave programmable delay circuit compensates the timing change by delaying the real clock signal when the master programmable delay circuit completes the delay locking process. The resulting circuit is small, flexible, PVT calibrated, and consumes very little power. It can be used with any reference clock to support various timing requirements at different frequencies.
REFERENCES:
patent: 5241429 (1993-08-01), Holsinger
patent: 5355037 (1994-10-01), Andresen et al.
patent: 6255879 (2001-07-01), Voss
patent: 6333652 (2001-12-01), Iida et al.
patent: 6366149 (2002-04-01), Lee et al.
Hao Hong
Hui Keven
LSI Logic Corporation
Mis David
Suiter - West - Swantz PC LLO
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