Method for fabricating semiconductor device having recess

Details Method for fabricating semiconductor device having recess Method for fabricating semiconductor device having recess

Filed on

2006-05-23

Date issued

2006-05-23

Examiner

Nhu, David (Department: 2818)

Patent Class

Semiconductor device manufacturing: process

SubClass

Chemical etching

SubSubClass

Combined with the removal of material by nonchemical means

Other Related Categories

C438S270000, C438S680000

Type

Reexamination Certificate

Status

active

Patent number

07049238

Description

ABSTRACT:
A method for forming a floating gate semiconductor device such as an electrically erasable programmable read only memory is provided. The device includes a silicon substrate having an electrically isolated active area. A gate oxide, as well as other components of a FET (e.g., source, drain) are formed in the active area. A self aligned floating gate is formed by depositing a conductive layer (e.g., polysilicon) into the recess and over the gate oxide. The conductive layer is then chemically mechanically planarized to an endpoint of the isolation layer so that all of the conductive layer except material in the recess and on the gate oxide is removed. Following formation of the floating gate an insulating layer is formed on the floating gate and a control gate is formed on the insulating layer.

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