High-density MOS-decoded unary DAC

Details High-density MOS-decoded unary DAC High-density MOS-decoded unary DAC

2006-06-27

2006-06-27

Nguyen, John B (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

With particular solid state devices

C341S144000, C341S145000

Reexamination Certificate

active

07068194

ABSTRACT:
Multiple switching circuits and current source circuits are arranged to operate as part of a compact unary DAC cell. The compact unary DAC cell can be combined with additional compact unary DAC cells to provide a scalable unary DAC system that may be segmented, non-segmented, single-ended, differential, or some other DAC topology that may employ one or more unary DAC cells. Each unary DAC cell is preferably comprised of transistors of a single type such that the maximum circuit density can be achieved. The current source circuits may each have equal current magnitudes. The total output current from the unary DAC cell corresponds to the combined currents from each of the current sources that are enabled.

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