Static information storage and retrieval – Addressing – Particular decoder or driver circuit
Reexamination Certificate
2006-09-12
2006-09-12
Auduong, Gene N. (Department: 2827)
Static information storage and retrieval
Addressing
Particular decoder or driver circuit
C365S189040, C365S238500
Reexamination Certificate
active
07106651
ABSTRACT:
A semiconductor memory device is arranged so that its circuit area is made smaller and the stored data may be constantly outputted at fast speed. The semiconductor memory device includes a memory cell array and an auxiliary cell array concatenated with word lines on the increasing side of bit-line addresses in the memory cell array. The auxiliary cell array stores data of memory cells in the range from a first bit-line address on a next word-line address to a bit-line address located apart by a predetermined number of bits. A Y-address driver is also included in the semiconductor memory device. The Y-address driver reads data from the auxiliary cell array following the last bit-line address if the read of data pieces at a time ranges from the last bit-line address to the first bit-line address on the next word-line address in the memory cell array.
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Kawamoto Satoru
Nagai Kenji
Arent & Fox PLLC
Auduong Gene N.
Spansion LLC
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