Dynamic information storage or retrieval – Condition indicating – monitoring – or testing – Including radiation storage or retrieval
Reexamination Certificate
2006-06-20
2006-06-20
Wellington, Andrea (Department: 2627)
Dynamic information storage or retrieval
Condition indicating, monitoring, or testing
Including radiation storage or retrieval
C369S047270, C327S147000, C327S156000
Reexamination Certificate
active
07065025
ABSTRACT:
A PLL circuit for generating a clock signal using a reference signal, the frequency of which is relatively low. The PLL circuit includes a first loop circuit for generating a first clock signal which is synchronized with a first reference signal. A second loop circuit generates a second clock signal which is synchronized with a second reference signal. The frequency of the second reference signal is sufficiently lower than the frequency of the first reference signal. The first reference signal is compared with the first clock signal to generate a first control voltage. The second reference signal is compared with the second clock signal to generate a second control voltage. The second loop circuit generates the second clock signal in accordance with the first control voltage and the second control voltage.
REFERENCES:
patent: 5072195 (1991-12-01), Graham et al.
patent: 5075639 (1991-12-01), Taya
patent: 5657359 (1997-08-01), Sakae et al.
patent: 5734301 (1998-03-01), Lee et al.
patent: 5909474 (1999-06-01), Yoshizawa
patent: 6693862 (2004-02-01), Shigemori
Ortiz-Criado Jorge L.
Sanyo Electric Co,. Ltd.
Wellington Andrea
LandOfFree
PLL circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with PLL circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and PLL circuit will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3620334